Part 1 of Developing native applications for LEGO® MINDSTORMS® NXT
Let's start by reviewing what happens when the NXT brick is turned on. By pressing the middle button the ATMEGA48 CPU (it is always on!) is signaled to turn on the power to the main CPU. At his point AT91SAM7S256 is turned on and performs power-on hardware reset, we will not go now into more details noticing only that it begins executing code starting at address 0 (&H00000000).
Address 0 is special and is referred to in ARM architecture as Reset Vector because this where the CPU always starts executing the code after the reset event. On AT91SAM7S256 after hardware reset address 0 is mapped to the internal Flash memory so the code executed at reset is the code programmed into the Flash memory.
Details of what happens during Reset are documented in ARMv4T architecture reference manual
and in “ARM7TDMI Technical Reference Manual” Rev 3 available from Atmel
http://www.atmel.com/dyn/resources/prod_documents/DDI0029G_7TDMI_R3_trm.pdf
Latest one revision r4p1 available from ARM
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0210c/DDI0210B.pdf
and in AT91SAM7S Series description
http://www.atmel.com/dyn/resources/prod_documents/doc6175.pdf
If the CPU starts from address 0 then what code is located at this address? In HBBRB Basic this the location where the Runtime Module (RM) code is located and specifically the so called Reset Handler. HBBRB Runtime Module plays very important role in initializing the CPU from the reset state to the running state based on user defined settings. All this happens before passing control to the user code by calling the Sub Main. Again not to be distracted by details (we will come back to the reset later) the Runtime Module performs three primary functions:
- First Runtime Module code initializes internal processor clock generation. Based on the Crystal (XTAL) frequency it setts internal PLL to generate desired processor clock frequency or PCK. XTAL setting found under “Configuration->ATSAM7S256->XTAL” is probably the most important user settings as it is required to be set correctly for popper operation. On the other hand if using default settings then PCK (found under “Configuration->ATSAM7S256->PMC Configuration->PCK”) will be configured automatically to the highest possible frequency. For the NXT brick the correct XTAL setting is 18432000 or 18.432MHz, PCK will be then set to 48054857 or about 48.055 MHz.
- In second step Runtime Module code initializes hardware peripherals. It starts with AIC (Advanced Interrupt Controller) and setups up all interrupt sources to be handled by default handlers that preform no action other then acknowledging the interrupt and returning. Other peripherals (in this case UART) they would be initialized based on settings. By default UART0 is initialized with 38400 Baud speed. However on NXT brick UART0 is used internally and has to be disabled by setting “Configuration->ATSAM7S256->UART0->Baud Rate” to 0.
- In the third step RM code initializes memory and runtime environment for the user BASIC code.
At this point generic initialization of the AT91SAM7S256 CPU is done and all the necessary preparations have been performed to call the code in Sub Main. This code will perform further initializations specific to the NXT Programmable Brick.
