|
Variables |
| Const UInteger | LPC2141_ID = &h0402FF01 |
| Const UInteger | LPC2142_ID = &h0402FF11 |
| Const UInteger | LPC2144_ID = &h0402FF12 |
| Const UInteger | LPC2146_ID = &h0402FF23 |
| Const UInteger | LPC2148_ID = &h0402FF25 |
| Const UInteger | WDT_INT = 0 |
| Const UInteger | SWI_INT = 1 |
| Const UInteger | ARM_CORE0_INT = 2 |
| Const UInteger | ARM_CORE1_INT = 3 |
| Const UInteger | TIMER0_INT = 4 |
| Const UInteger | TIMER1_INT = 5 |
| Const UInteger | UART0_INT = 6 |
| Const UInteger | UART1_INT = 7 |
| Const UInteger | PWM0_INT = 8 |
| Const UInteger | I2C0_INT = 9 |
| Const UInteger | SPI0_INT = 10 |
| Const UInteger | SPI1_INT = 11 |
| Const UInteger | PLL_INT = 12 |
| Const UInteger | RTC_INT = 13 |
| Const UInteger | EINT0_INT = 14 |
| Const UInteger | EINT1_INT = 15 |
| Const UInteger | EINT2_INT = 16 |
| Const UInteger | EINT3_INT = 17 |
| Const UInteger | ADC0_INT = 18 |
| Const UInteger | I2C1_INT = 19 |
| Const UInteger | BOD_INT = 20 |
| Const UInteger | ADC1_INT = 21 |
| Const UInteger | USB_INT = 22 |
| Register UInteger | WDMOD = &hE0000000 |
| Register UInteger | WDTC = &hE0000004 |
| | WDTC Watchdog Timer Constant Register R/W 0xFF.
|
| Register UInteger | WDFEED = &hE0000008 |
| | WDFEED Watchdog Feed Register WO NA.
|
| Register UInteger | WDTV = &hE000000C |
| | WDTV.
|
| Register UInteger | T0IR = &hE0004000 |
| Register UInteger | T0TCR = &hE0004004 |
| | TCR Timer Control Register RW 0.
|
| Register UInteger | T0TC = &hE0004008 |
| | TC Timer Counter RW 0.
|
| Register UInteger | T0PR = &hE000400C |
| | PR Prescale Register RW 0.
|
| Register UInteger | T0PC = &hE0004010 |
| | PC Prescale Counter RW 0.
|
| Register UInteger | T0MCR = &hE0004014 |
| | MCR Match Control Register RW 0.
|
| Register UInteger | T0MR0 = &hE0004018 |
| | MR0 Match Register 0 RW 0.
|
| Register UInteger | T0MR1 = &hE000401C |
| | MR1 Match Register 1 RW 0.
|
| Register UInteger | T0MR2 = &hE0004020 |
| | MR2 Match Register 2 RW 0.
|
| Register UInteger | T0MR3 = &hE0004024 |
| | MR3 Match Register 3 RW 0.
|
| Register UInteger | T0CCR = &hE0004028 |
| | CCR Capture Control Register RW 0.
|
| Register UInteger | T0CR0 = &hE000402C |
| | CR0 Capture Register 0 RO 0.
|
| Register UInteger | T0CR1 = &hE0004030 |
| | CR1 Capture Register 1 RO 0.
|
| Register UInteger | T0CR2 = &hE0004034 |
| | CR2 Capture Register 2 RO 0.
|
| Register UInteger | T0CR3 = &hE0004038 |
| | CR3 Capture Register 3 RO 0.
|
| Register UInteger | T0EMR = &hE000403C |
| | EMR External Match Register RW 0.
|
| Register UInteger | T0CTCR = &hE0004070 |
| | CTCR Count Control Register RW 0.
|
| Register UInteger | T1IR = &hE0008000 |
| Register UInteger | T1TCR = &hE0008004 |
| | TCR Timer Control Register RW 0.
|
| Register UInteger | T1TC = &hE0008008 |
| | TC Timer Counter RW 0.
|
| Register UInteger | T1PR = &hE000800C |
| | PR Prescale Register RW 0.
|
| Register UInteger | T1PC = &hE0008010 |
| | PC Prescale Counter RW 0.
|
| Register UInteger | T1MCR = &hE0008014 |
| | MCR Match Control Register RW 0.
|
| Register UInteger | T1MR0 = &hE0008018 |
| | MR0 Match Register 0 RW 0.
|
| Register UInteger | T1MR1 = &hE000801C |
| | MR1 Match Register 1 RW 0.
|
| Register UInteger | T1MR2 = &hE0008020 |
| | MR2 Match Register 2 RW 0.
|
| Register UInteger | T1MR3 = &hE0008024 |
| | MR3 Match Register 3 RW 0.
|
| Register UInteger | T1CCR = &hE0008028 |
| | CCR Capture Control Register RW 0.
|
| Register UInteger | T1CR0 = &hE000802C |
| | CR0 Capture Register 0 RO 0.
|
| Register UInteger | T1CR1 = &hE0008030 |
| | CR1 Capture Register 1 RO 0.
|
| Register UInteger | T1CR2 = &hE0008034 |
| | CR2 Capture Register 2 RO 0.
|
| Register UInteger | T1CR3 = &hE0008038 |
| | CR3 Capture Register 3 RO 0.
|
| Register UInteger | T1EMR = &hE000803C |
| | EMR External Match Register RW 0.
|
| Register UInteger | T1CTCR = &hE0008070 |
| | CTCR Count Control Register RW 0.
|
| Register UInteger | U0RBR = &hE000C000 |
| Register UInteger | U0THR = &hE000C000 |
| | U0THR Transmit Holding Register WO NA DLAB=0.
|
| Register UInteger | U0DLL = &hE000C000 |
| | U0DLL Divisor Latch LSB Register RW &h01 DLAB=1.
|
| Register UInteger | U0DLM = &hE000C004 |
| | U0DLM Divisor Latch MSB Register RW &h00 DLAB=1.
|
| Register UInteger | U0IER = &hE000C004 |
| | U0IER Interrupt Enable Register RW &h00 DLAB=0.
|
| Register UInteger | U0IIR = &hE000C008 |
| | U0IIR Interrupt ID Register RO &h01.
|
| Register UInteger | U0FCR = &hE000C008 |
| | U0FCR FIFO Control Register WO &h00.
|
| Register UInteger | U0LCR = &hE000C00C |
| | U0LCR Line Control Register RW &h00.
|
| Register UInteger | U0LSR = &hE000C014 |
| | U0LSR Line Status Register RO &h60.
|
| Register UInteger | U0SCR = &hE000C01C |
| | U0SCR Scratch Pad Register RW &h00.
|
| Register UInteger | U0ACR = &hE000C020 |
| | U0ACR Auto-baud Control Register RW &h00.
|
| Register UInteger | U0FDR = &hE000C028 |
| | U0FDR Fractional Divider Register RW &h10.
|
| Register UInteger | U0TER = &hE000C030 |
| | U0TER TX Enable Register RW &h80.
|
| Register UInteger | U1RBR = &hE0010000 |
| Register UInteger | U1THR = &hE0010000 |
| | U1THR Transmit Holding Register WO NA DLAB=0.
|
| Register UInteger | U1DLL = &hE0010000 |
| | U1DLL Divisor Latch LSB RW &h01 DLAB=1.
|
| Register UInteger | U1DLM = &hE0010004 |
| | U1DLM Divisor Latch MSB RW &h00 DLAB=1.
|
| Register UInteger | U1IER = &hE0010004 |
| | U1IER Interrupt Enable Register RW &h00 DLAB=0.
|
| Register UInteger | U1IIR = &hE0010008 |
| | U1IIR Interrupt ID Register RO &h01.
|
| Register UInteger | U1FCR = &hE0010008 |
| | U1FCR FIFO Control Register WO &h00.
|
| Register UInteger | U1LCR = &hE001000C |
| | U1LCR Line Control Register RW &h00.
|
| Register UInteger | U1MCR = &hE0010010 |
| | U1MCR Modem Control Register RW &h00.
|
| Register UInteger | U1LSR = &hE0010014 |
| | U1LSR Line Status Register RO &h60.
|
| Register UInteger | U1MSR = &hE0010018 |
| | U1MSR Modem Status Register RO &h00.
|
| Register UInteger | U1SCR = &hE001001C |
| | U1SCR Scratch Pad Register RW &h00.
|
| Register UInteger | U1ACR = &hE0010020 |
| | U1ACR Auto-baud Control Register RW &h00.
|
| Register UInteger | U1FDR = &hE0010028 |
| | U1FDR Fractional Divider Register RW &h10.
|
| Register UInteger | U1TER = &hE0010030 |
| | U1TER TX Enable Register RW &h80.
|
| Register UInteger | PWMIR = &hE0014000 |
| Register UInteger | PWMTCR = &hE0014004 |
| | PWMTCR PWM Timer Control Register RW 0.
|
| Register UInteger | PWMTC = &hE0014008 |
| | PWMTC PWM Timer Counter Register RW 0.
|
| Register UInteger | PWMPR = &hE001400C |
| | PWMPR PWM Prescale Register RW 0.
|
| Register UInteger | PWMPC = &hE0014010 |
| | PWMPC PWM Prescale Counter RW 0.
|
| Register UInteger | PWMMCR = &hE0014014 |
| | PWMMCR PWM Match Control Register RW 0.
|
| Register UInteger | PWMMR0 = &hE0014018 |
| | PWMMR0 PWM Match Register 0 RW 0.
|
| Register UInteger | PWMMR1 = &hE001401C |
| | PWMMR1 PWM Match Register 1 RW 0.
|
| Register UInteger | PWMMR2 = &hE0014020 |
| | PWMMR2 PWM Match Register 2 RW 0.
|
| Register UInteger | PWMMR3 = &hE0014024 |
| | PWMMR3 PWM Match Register 3 RW 0.
|
| Register UInteger | PWMMR4 = &hE0014040 |
| | PWMMR4 PWM Match Register 4 RW 0.
|
| Register UInteger | PWMMR5 = &hE0014044 |
| | PWMMR5 PWM Match Register 5 RW 0.
|
| Register UInteger | PWMMR6 = &hE0014048 |
| | PWMMR6 PWM Match Register 6 RW 0.
|
| Register UInteger | PWMPCR = &hE001404C |
| | PWMPCR PWM Control Register RW 0.
|
| Register UInteger | PWMLER = &hE0014050 |
| | PWMLER PWM Latch Enable Register RW 0.
|
| Register UInteger | I2C0CONSET = &hE001C000 |
| Register UInteger | I2C0STAT = &hE001C004 |
| Register UInteger | I2C0DAT = &hE001C008 |
| Register UInteger | I2C0ADR = &hE001C00C |
| Register UInteger | I2C0SCLH = &hE001C010 |
| Register UInteger | I2C0SCLL = &hE001C014 |
| Register UInteger | I2C0CONCLR = &hE001C018 |
| Register UInteger | S0SPCR = &hE0020000 |
| | SPI0 Dev 8 INT 10 &hE0020000.
|
| Register UInteger | S0SPSR = &hE0020004 |
| Register UInteger | S0SPDR = &hE0020008 |
| Register UInteger | S0SPCCR = &hE002000C |
| Register UInteger | S0SPINT = &hE002001C |
| Register UInteger | ILR = &hE0024000 |
| Register UInteger | CTC = &hE0024004 |
| | Clock Tick Counter RO *.
|
| Register UInteger | CCR = &hE0024008 |
| | Clock Control Register R/W *.
|
| Register UInteger | CIIR = &hE002400C |
| | Counter Increment Interrupt Register R/W *.
|
| Register UInteger | AMR = &hE0024010 |
| | Alarm Mask Register R/W *.
|
| Register UInteger | CTIME0 = &hE0024014 |
| | Consolidated Time Register 0 RO *.
|
| Register UInteger | CTIME1 = &hE0024018 |
| | Consolidated Time Register 1 RO *.
|
| Register UInteger | CTIME2 = &hE002401C |
| | Consolidated Time Register 2 RO *.
|
| Register UInteger | SEC = &hE0024020 |
| | Seconds Counter R/W *.
|
| Register UInteger | MIN = &hE0024024 |
| | Minutes Register R/W *.
|
| Register UInteger | HOUR = &hE0024028 |
| | Hours Register R/W *.
|
| Register UInteger | DOM = &hE002402C |
| | Day of Month Register R/W *.
|
| Register UInteger | DOW = &hE0024030 |
| | Day of Week Register R/W *.
|
| Register UInteger | DOY = &hE0024034 |
| | Day of Year Register R/W *.
|
| Register UInteger | MONTH = &hE0024038 |
| | Months Register R/W *.
|
| Register UInteger | YEAR = &hE002403C |
| | Years Register R/W *.
|
| Register UInteger | ALSEC = &hE0024060 |
| | Alarm value for Seconds R/W *.
|
| Register UInteger | ALMIN = &hE0024064 |
| | Alarm value for Minutes R/W *.
|
| Register UInteger | ALHOUR = &hE0024068 |
| | Alarm value for Hours R/W *.
|
| Register UInteger | ALDOM = &hE002406C |
| | Alarm value for Day of Month R/W *.
|
| Register UInteger | ALDOW = &hE0024070 |
| | Alarm value for Day of Week R/W *.
|
| Register UInteger | ALDOY = &hE0024074 |
| | Alarm value for Day of Year R/W *.
|
| Register UInteger | ALMON = &hE0024078 |
| | Alarm value for Months R/W *.
|
| Register UInteger | ALYEAR = &hE002407C |
| | Alarm value for Year R/W *.
|
| Register UInteger | PREINT = &hE0024080 |
| | Prescaler value, integer portion R/W *.
|
| Register UInteger | PREFRAC = &hE0024084 |
| | Prescaler value, fraction portion R/W *.
|
| Register UInteger | IO0PIN = &hE0028000 |
| | GPIO Dev 10 &hE0028000.
|
| Register UInteger | IO0SET = &hE0028004 |
| Register UInteger | IO0DIR = &hE0028008 |
| Register UInteger | IO0CLR = &hE002800C |
| Register UInteger | IO1PIN = &hE0028010 |
| Register UInteger | IO1SET = &hE0028014 |
| Register UInteger | IO1DIR = &hE0028018 |
| Register UInteger | IO1CLR = &hE002801C |
| Register UInteger | PINSEL0 = &hE002C000 |
| Register UInteger | PINSEL1 = &hE002C004 |
| | Pin function select register 1 RW &h00000000.
|
| Register UInteger | PINSEL2 = &hE002C014 |
| | Pin function select register 2 RW.
|
| Register UInteger | AD0CR = &hE0034000 |
| Register UInteger | AD0GDR = &hE0034004 |
| | ADGDR A/D Global Data Register R/W.
|
| Register UInteger | ADGSR = &hE0034008 |
| | ADGSR A/D Global Start Register WO.
|
| Register UInteger | AD0INTEN = &hE003400C |
| | ADINTEN A/D Interrupt Enable Register R/W.
|
| Register UInteger | AD0DR0 = &hE0034010 |
| | ADDR0 A/D Channel 0 Data Register RO.
|
| Register UInteger | AD0DR1 = &hE0034014 |
| | ADDR1 A/D Channel 1 Data Register RO.
|
| Register UInteger | AD0DR2 = &hE0034018 |
| | ADDR2 A/D Channel 2 Data Register RO.
|
| Register UInteger | AD0DR3 = &hE003401C |
| | ADDR3 A/D Channel 3 Data Register RO.
|
| Register UInteger | AD0DR4 = &hE0034020 |
| | ADDR4 A/D Channel 4 Data Register RO.
|
| Register UInteger | AD0DR5 = &hE0034024 |
| | ADDR5 A/D Channel 5 Data Register RO.
|
| Register UInteger | AD0DR6 = &hE0034028 |
| | ADDR6 A/D Channel 6 Data Register RO.
|
| Register UInteger | AD0DR7 = &hE003402C |
| | ADDR7 A/D Channel 7 Data Register RO.
|
| Register UInteger | AD0STAT = &hE0034030 |
| | ADSTAT A/D Status Register RO.
|
| Register UInteger | I2C1CONSET = &hE005C000 |
| Register UInteger | I2C1STAT = &hE005C004 |
| Register UInteger | I2C1DAT = &hE005C008 |
| Register UInteger | I2C1ADR = &hE005C00C |
| Register UInteger | I2C1SCLH = &hE005C010 |
| Register UInteger | I2C1SCLL = &hE005C014 |
| Register UInteger | I2C1CONCLR = &hE005C018 |
| Register UInteger | AD1CR = &hE0060000 |
| Register UInteger | AD1GDR = &hE0060004 |
| | ADGDR A/D Global Data Register R/W.
|
| Register UInteger | AD1INTEN = &hE006000C |
| | ADINTEN A/D Interrupt Enable Register R/W.
|
| Register UInteger | AD1DR0 = &hE0060010 |
| | ADDR0 A/D Channel 0 Data Register RO.
|
| Register UInteger | AD1DR1 = &hE0060014 |
| | ADDR1 A/D Channel 1 Data Register RO.
|
| Register UInteger | AD1DR2 = &hE0060018 |
| | ADDR2 A/D Channel 2 Data Register RO.
|
| Register UInteger | AD1DR3 = &hE006001C |
| | ADDR3 A/D Channel 3 Data Register RO.
|
| Register UInteger | AD1DR4 = &hE0060020 |
| | ADDR4 A/D Channel 4 Data Register RO.
|
| Register UInteger | AD1DR5 = &hE0060024 |
| | ADDR5 A/D Channel 5 Data Register RO.
|
| Register UInteger | AD1DR6 = &hE0060028 |
| | ADDR6 A/D Channel 6 Data Register RO.
|
| Register UInteger | AD1DR7 = &hE006002C |
| | ADDR7 A/D Channel 7 Data Register RO.
|
| Register UInteger | AD1STAT = &hE0060030 |
| | ADSTAT A/D Status Register RO.
|
| Register UInteger | SSPCR0 = &hE0068000 |
| Register UInteger | SSPCR1 = &hE0068004 |
| Register UInteger | SSPDR = &hE0068008 |
| Register UInteger | SSPSR = &hE006800C |
| Register UInteger | SSPCPSR = &hE0068010 |
| Register UInteger | SSPIMSC = &hE0068014 |
| Register UInteger | SSPRIS = &hE0068018 |
| Register UInteger | SSPMIS = &hE006801C |
| Register UInteger | SSPICR = &hE0068020 |
| Register UInteger | DACR = &hE006C000 |
| | DAC Dev 27 &hE006C000.
|
| Register UInteger | MAMCR = &hE01FC000 |
| Register UInteger | MAMTIM = &hE01FC004 |
| Register UInteger | MEMMAP = &hE01FC040 |
| | Memory Mapping Control RW 0.
|
| Register UInteger | PCON = &hE01FC0C0 |
| Register UInteger | PCONP = &hE01FC0C4 |
| | Power Control for Peripherals RW &h03BE.
|
| Register UInteger | VPBDIV = &hE01FC100 |
| | VPB Divider Control RW 0.
|
| Register UInteger | EXTINT = &hE01FC140 |
| Register UInteger | INTWAKE = &hE01FC144 |
| | Interrupt Wakeup Register RW 0.
|
| Register UInteger | EXTMODE = &hE01FC148 |
| | External Interrupt Mode Register RW 0.
|
| Register UInteger | EXTPOLAR = &hE01FC14C |
| | External Interrupt Polarity Register RW 0.
|
| Register UInteger | RSID = &hE01FC180 |
| | Reset Source Identification Register RW 0.
|
| Register UInteger | CSPR = &hE01FC184 |
| | Code Security Protection Register RO 0.
|
| Register UInteger | SCS = &hE01FC1A0 |
| | System Controls and Status RW 0.
|
| Register UInteger | FIO0DIR = &h3FFFC000 |
| Register UInteger | FIO0MASK = &h3FFFC010 |
| Register UInteger | FIO0PIN = &h3FFFC014 |
| Register UInteger | FIO0SET = &h3FFFC018 |
| Register UInteger | FIO0CLR = &h3FFFC01C |
| Register UInteger | FIO1DIR = &h3FFFC020 |
| Register UInteger | FIO1MASK = &h3FFFC030 |
| Register UInteger | FIO1PIN = &h3FFFC034 |
| Register UInteger | FIO1SET = &h3FFFC038 |
| Register UInteger | FIO1CLR = &h3FFFC03C |
| Register UInteger | VICIRQStatus = &hFFFFF000 |
| Register UInteger | VICFIQStatus = &hFFFFF004 |
| Register UInteger | VICRawIntr = &hFFFFF008 |
| Register UInteger | VICIntSelect = &hFFFFF00C |
| Register UInteger | VICIntEnable = &hFFFFF010 |
| Register UInteger | VICIntEnClr = &hFFFFF014 |
| Register UInteger | VICSoftInt = &hFFFFF018 |
| Register UInteger | VICSoftIntClr = &hFFFFF01C |
| Register UInteger | VICProtection = &hFFFFF020 |
| Register UInteger | VICVectAddr = &hFFFFF030 |
| Register UInteger | VICDefVectAddr = &hFFFFF034 |
| Register UInteger | VICVectAddr0 = &hFFFFF100 |
| Register UInteger | VICVectAddr1 = &hFFFFF104 |
| Register UInteger | VICVectAddr2 = &hFFFFF108 |
| Register UInteger | VICVectAddr3 = &hFFFFF10C |
| Register UInteger | VICVectAddr4 = &hFFFFF110 |
| Register UInteger | VICVectAddr5 = &hFFFFF114 |
| Register UInteger | VICVectAddr6 = &hFFFFF118 |
| Register UInteger | VICVectAddr7 = &hFFFFF11C |
| Register UInteger | VICVectAddr8 = &hFFFFF120 |
| Register UInteger | VICVectAddr9 = &hFFFFF124 |
| Register UInteger | VICVectAddr10 = &hFFFFF128 |
| Register UInteger | VICVectAddr11 = &hFFFFF12C |
| Register UInteger | VICVectAddr12 = &hFFFFF130 |
| Register UInteger | VICVectAddr13 = &hFFFFF134 |
| Register UInteger | VICVectAddr14 = &hFFFFF138 |
| Register UInteger | VICVectAddr15 = &hFFFFF13C |
| Register UInteger | VICVectCntl0 = &hFFFFF200 |
| Register UInteger | VICVectCntl1 = &hFFFFF204 |
| Register UInteger | VICVectCntl2 = &hFFFFF208 |
| Register UInteger | VICVectCntl3 = &hFFFFF20C |
| Register UInteger | VICVectCntl4 = &hFFFFF210 |
| Register UInteger | VICVectCntl5 = &hFFFFF214 |
| Register UInteger | VICVectCntl6 = &hFFFFF218 |
| Register UInteger | VICVectCntl7 = &hFFFFF21C |
| Register UInteger | VICVectCntl8 = &hFFFFF220 |
| Register UInteger | VICVectCntl9 = &hFFFFF224 |
| Register UInteger | VICVectCntl10 = &hFFFFF228 |
| Register UInteger | VICVectCntl11 = &hFFFFF22C |
| Register UInteger | VICVectCntl12 = &hFFFFF230 |
| Register UInteger | VICVectCntl13 = &hFFFFF234 |
| Register UInteger | VICVectCntl14 = &hFFFFF238 |
| Register UInteger | VICVectCntl15 = &hFFFFF23C |