Configuring MOD

Configuring MOD
	Chapter 8. Runtime Module Reference

MOD file is configured through Project Navigator Configuration Tree.

Linker configuration

Linker configuration options affecting memory layout.

HBBR Basic memory layout

Flash

Bottom of ROM
Runtime ROM code and data
Basic ROM code and data
Top of ROM

SRAM

Bottom of RAM
Runtime RAM data
Basic RAM data
Heap
Stack
Top of RAM

Option	Sub-option	Values	Notes
ROM bottom		UInteger	Bottom (lowest) Flash address – RO Depends on the CPU
ROM BASIC bottom		UInteger	Bottom (lowest) address of the BASIC code in Flash - RW. Defaults to the first address after runtime. Can be modified by the user.
ROM BASIC top		UInteger	Top (highest) address of the BASIC code in Flash - RW. Defaults to the highest possible Flash address (ROM top).Can be modified by the user.
ROM top		UInteger	Top (highest) Flash address – RO Depends on the CPU
RAM bottom		UInteger	Bottom (lowest) RAM address – RO Depends on the CPU
RAM BASIC data bottom		UInteger	Bottom (lowest) address of the BASIC data in RAM– RW
RAM stack top		UInteger	Top (highest) address of the stack in in RAM– RW
RAM top		UInteger	Top (highest) RAM address – RO Depends on the CPU

Runtime configuration

Option	Sub-option	Values	Notes
Print Banner		Boolean [yes,no]	Startup banner flag - RW
Heap Size		Integer	Size of Basic heap - RW
CPUID		Integer	CPUID - RO
Version major		Integer	Version number major - RO
Version minor		Integer	Version number minor - RO
External Flash		Boolean [enable,disable]	Controls usage of the external flash for compiled code. If enabled compiled Basic code will be stored in external Flash. If disabled then both runtime and compiled code will be stored in internal memory
External Flash Start Address		Integer	External flash memory start address
External Flash Size		Integer	External flash memory size
External RAM		Boolean [enable,disable]	Controls usage of the external RAM. If enabled Basic data, heap and stack will be stored in external RAM. If disabled data, heap and stack for both runtime and compiled code will be stored in internal RAM memory.
External RAM Start Address		Integer	External RAM memory start address
External RAM Size		Integer	External RAM memory size
lpc214x USB RAM		Boolean [enable,disable]	Enable USB RAM on lpc2146 and lpc2148
lpc214x USB RAM heap size		Integer	Use USB RAM on lpc2146 and lpc2148 for heap if more then 0.
lpc229x PINSEL2		Integer 0 – do not use	Lpc229x PINSEL2 value, controls external memory interface lpc2292/lpc2294
lpc229x BCFG0		Integer 0 – do not use	Lpc229x BCFG0 external memory configuration
lpc229x BCFG1		Integer 0 – do not use	Lpc229x BCFG1 external memory configuration
lpc229x BCFG2		Integer 0 – do not use	Lpc229x BCFG2 external memory configuration
lpc229x BCFG3		Integer 0 – do not use	Lpc229x BCFG3 external memory configuration

LPC2000 configuration

Option	Sub-option	Values	Notes
XTAL		Integer	Crystal frequency - RW
SCB Configuration		Auto Manual	Auto – automatic configuration Manual – manual configuration
	MAMCR	0 – 2	MAM registers determines MAM functional mode. Check manual for details.
	MAMTIM	1- 7	MAM Timing register, determines number of clock cycles when accessing Flash memory
	PLLCFG		PLLCFG register contains the PLL multiplier and divider values. Check manual for details.
	APBDIV (VPBDIV)	0 – division by 4 1 – no division 2 – division by 2	Divider for peripheral clock. Check manual for details. In some versions of the lpc2000 series it is referred to as VPBDIV.
UART0			Serial port 0 - RW
	Flags	Combination of flags	Default settings for UART0, used by console and debug monitor 81DOD – default 8 bit data 1 stop parity disabled
	Baud rate	Integer	Baud rate setting used by console and debug monitor 38400 default
UART1			Serial port 1 - RW
	Flags	Combination of flags	Default settings for UART1 81DOD – default 8 bit data 1 stop parity disabled
	Baud rate	Integer	Baud rate setting 0- default disabled

SCB Configuration Constants

SCB (System Configuration Block) configuration settings are accessible at runtime through predefined Const (read-only) corresponding to the graphical configuration tree nodes:

Declare Const __conf_FOSC As UInteger

Declare Const __conf_FCCLK As UInteger

Declare Const __conf_FCCO As UInteger

Declare Const __conf_FPCLK As UInteger

Declare Const __conf_PLLCFG As UInteger

Declare Const __conf_APBDIV As UInteger

Declare Const __conf_MEMMAP As UInteger

Declare Const __conf_MAMCR As UInteger

Declare Const __conf_MAMTIM As UInteger

External memory on lpc2292/lpc2294

External memory is configured in two steps

External memory interface configuration
External static memory controller in lpc229x microcontroller allows to configure up to 4 memory banks. lpc2292 and lpc2294 HBBR Basic runtimes have options allowing to specify values that will be stored in BCFGx registers during the boot process. To correctly configure external memory consult your board documentation as well lpc2292/lpc2294 manual, determine proper values for BCFGx registers and set the runtime options. If the option value for the BCFGx register is 0 (default) it will not be set during boot process.
1. BCFG0
2. BCFG1
3. BCFG2
4. BCFG3
Pins used to interface to the memory are configured using PINSEL2 register. lpc2292 and lpc2294 runtimes provide option PINSEL2 to specify the value. If the option value for the PINSEL2 register is 0 (default) it will not be set during boot process.
1. PINSEL2
Compiler configuration
When external memory is used HBBR Basic compiler requires configuration through the external memory options present in runtimes of the microcontrollers that support external memory. HBBR Basic compiler can take advantage of up two 2 memory banks, one Flash and one RAM for Basic code and data.
Four memory models are supported:

Memory Model	Option	Comment
Internal memory only
	External Flash	disable
	External Flash Start Address	0
	External Flash Size	0
	External RAM	disable
	External RAM Start Address	0
	External RAM Size	0
Runtime in internal memory Basic Code in internal memory Runtime Data in internal memory Basic Data in external memory
	External Flash	disable
	External Flash Start Address	0
	External Flash Size	0
	External RAM	enable
	External RAM Start Address	set according to the board specification
	External RAM Size	set according to the board specification
Runtime in internal memory Basic Code in external memory Runtime Data in internal memory Basic Data in internal memory
	External Flash	enable
	External Flash Start Address	set according to the board specification
	External Flash Size	set according to the board specification
	External RAM	disable
	External RAM Start Address	0
	External RAM Size	0
Runtime in internal memory Basic Code in external memory Runtime Data in internal memory Basic Data in external memory
	External Flash	enable
	External Flash Start Address	set according to the board specification
	External Flash Size	set according to the board specification
	External RAM	enable
	External RAM Start Address	set according to the board specification
	External RAM Size	set according to the board specification

AT91SAM7 configuration

Option	Sub-option	Values	Notes
XTAL		Integer	Crystal frequency (Main Clock) – RW
PMC Configuration		Auto Manual	Auto – automatic configuration Manual – manual configuration
	CSS	0 – Slow Clock 1 – Main Clock 2 – Reserved 3 – PLL Clock	Clock Source Selection
	DIV	0 to 255	PLL DIV divider factor
	MCK	Integer	Master Clock, can be one of MAINCK SLCK or PLLCK see CSS
	MUL	0 to 2047	PLL MUL multiplier factor
	PCK	Integer	Processor Clock
	PLLCK	Integer	PLL Clock
	PRES	1 to 64	Prescaler of the selected clock, division by power of 2
	SLCK	Integer	Slow Clock
	UDPCK	Integer	USB Device Clock
	UDBDIV	Integer	USB Device Clock divider factor
UART0			Serial port 0 - RW
	Flags	Combination of flags	Default settings for UART0, used by console and debug monitor 81DO – default 8 bit data 1 stop parity disabled
	Baud rate	Integer	Baud rate setting used by console and debug monitor 38400 default
UART1			Serial port 1 - RW
	Flags	Combination of flags	Default settings for UART1 81DO – default 8 bit data 1 stop parity disabled
	Baud rate	Integer	Baud rate setting 0- default disabled

PMC Configuration Constants

PMC (Power Management Controller) configuration settings are accessible at runtime through predefined Const (read-only) corresponding to the graphical configuration tree nodes:

Declare Const __conf_MCK As UInteger

Declare Const __conf_CSS As UInteger

Declare Const __conf_PRES As UInteger

Declare Const __conf_MAINCK As UInteger

Declare Const __conf_SLCK As UInteger

Declare Const __conf_PLLCK As UInteger

Declare Const __conf_DIV As UInteger

Declare Const __conf_MUL As UInteger

Declare Const __conf_PCK As UInteger

Declare Const __conf_UDPCK As UInteger

Declare Const __conf_USBDIV As UInteger


Interrupt Handling		Chapter 9. Runtime Functions